1. Field of the Invention
The present invention generally relates to a method and apparatus for extracting heat from electronic devices, and more particularly to a method and apparatus for extracting additional heat laterally, using an in-plane structure, from high power devices with high efficiency, and even more particularly to extracting such heat from semiconductor devices fabricated on a silicon die.
2. Description of the Related Art
The competitive trend in electronic industry is to provide more useful functions in an electronic module at higher speeds while ever reducing the cost. The transistors that are the building blocks dissipate heat while active due to switching, and continue to dissipate heat due to leakage currents while idling. A problem area in many semiconductor devices is that the heat generated thereby affects performance of such devices. The switching characteristics of a digital logic becomes less reliable as temperature rises above 100 deg C. As a result, typically there some form of a cooling solution is provided to remove heat from the electronic device, and preferably off of the chip.
FIG. 1A is a schematic side view of a conventional configuration 1 of a semiconductor chip with components associated with thermal cooling. The transistors fabricated on a silicon chip can generate heat of the order of 100 W under active conditions. Generally, in such chips, all of the electronics of the chip are built in a limited area (for example, 15 mm×15 mm). As a result, the heat flux density is typically high. The heat is generated by the heat source 2 and it flows upwardly (as indicated by arrow 3) through a thermal interface material (TIM) 4 which is positioned between the heat source 2 and a heat sink 5. The TIM 4 material may be a conductive paste, gel, liquid-metal, or the like. The heat sink 5 extracts the heat through the heat flux path 3 substantially in a direction perpendicular to the surface of the heat source 2. The heat sink 5 may be formed in a number of different conventional ways such as air-cooled heat fins supported on a copper block, a liquid cooled cold plate, etc., and may be formed of a heat-conducting material such as a metal or the like.
In such a structure, a problem results based on the high thermal resistance due to the restricted area of the chip. Indeed, the transistor density of a chip is becoming denser and denser, and the chip area is becoming smaller and smaller to achieve a certain logical function, for example, a floating point unit that facilitates multiplication. To achieve higher computational speed, the electronic circuits are typically confined to a very small area which gives rise to “hotspots” where the temperature tends to be higher (10-20 degC) than the remaining area of a chip. It is noted that even though silicon may be a good conductor by itself, because the silicon undergoes as many as 400 expensive process steps to build the electronics onto it, the silicon “real estate” is very expensive. Thus, even though for example, 100 W power is generated on an active chip, one is confined to only use the limited silicon area of a chip. That is, the thermal flux density is very high over the chip, thereby making the temperature of the chip very high and thereby limiting chip performance. In sum, chip real estate is very costly (precious) and to increase such area to alleviate the high thermal resistance (and thus the heat flux) also is very costly, if not prohibitive.
The above problem is generally encountered in most semiconductor chips, but is especially problematic in some high performance microprocessors and game-chips that have multiple cores that dissipate substantially high power in the form of heat.
High thermal condition not only affects the computational reliability of the electronic circuits, but also introduces thermomechanically-induced stresses in the components used to assemble an electronic module. In addition, higher temperature found near hotspots can contribute to degradation of the TIM material.